In an electronic package or module, internal electrical connections or electrical connections towards a printed circuit board (PCB) may be used. These electrical connections may be realized in flip chip ball grid array (fcBGA) packages by metal layers in a substrate. Alternatively, the connections may be realized in wafer level packages like an embedded wafer level BGA (eWLB) or a wafer level chip scale package (WLCSP) by a patterned redistribution layer (RDL). Generally, a single metal portion of an RDL may be referred to herein as a “line.”
In legacy packages, a line of an RDL may have a typically rectangular cross section. The cross sectional area of the line may serve to define the ohmic resistance experienced by current flowing through the line.